Current platform delivery¶
The default implementation is Core / Arch / SoC / Board / static factory / polymorphic I/O / optional OS / optional components. One TOML is strictly validated and resolved through immutable IR to generate exact instances. The factory returns stable read-only interface objects with shared read-only operation tables; independent state remains inside each provider. Getting an interface does not start hardware. External projects own applications, product tasks, private PCBs, Flash partitions, recovery and security policy.
The current public version is the v0.2.1 software preview, fixed to platform source b1b903da. See 0.2.1 preview delivery for its Source SDK, actual CI, Release and documentation publication. The preview establishes neither a new formal software candidate nor physical qualification.
The latest selected software candidates in this round are fixed to P2 ab532250. See current P2 unsigned software delivery for two complete 159-stage runs, eight candidates / 16 fresh network-disabled builds, SDK v15, the P2 strict bilingual package and actual public recovery of the unsigned outer archive. Independent QA followup 706ee80 passed the ordinary complete-index gate and full Python174 analysis. All 38 findings, including 2 errors, uniquely map to previously reviewed dispositions; seven old findings disappeared and none is new. Private E f59debf1 pins P2; 17 presets / 116 commands, five real C broker scenarios each in source and installed builds, three recipes and the public SDK walk actually passed. Private originals remain private. E completed a normal nonforce push and exact readback of f59debf1; the repository remains private and private main is unchanged. Later D/deployment/FF await their own actual results. Historical 7590b2d4 and the preview above retain their identities; documentation or QA commits do not transfer qualification. Continue through the iteration entry, with status maintained only in the original delivery ledger.
Further documentation organization is described in architecture and delivery planning. The documentation tools, prose and figure atlas are implemented; documentation acceptance and firmware qualification are recorded separately. The current entry point is documentation.
Reading entry |
Description |
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Nine software work packages and integration exits; the 75-task ledger owns current status and physical H1–H6 remain unexecuted |
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Physical directories, dependency direction, execution and resource responsibility |
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Nine-core ABI/features, Core/Arch/OS runtime and configuration examples |
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Configuration, explicit storage, external multitasking examples and OS HIL scope |
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Context and ownership for atomics, masks, cache/MPU/SAU |
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F407/F470 launch modes, G474/H743/U575 reference vertical slices and exact unknowns |
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Consistency of facts/routes, reference Boards, software fixtures and production definitions |
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Actual execution versus pending clean-source sealing |
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Exact source, execution results and unexecuted physical boundaries of the sealed baseline |
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G474 EXTI, H743 Cache/DMA, U575 split-domain reference and subsequent acceptance status |
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Historical SoC fixed source, full CI, offline candidates and archive digests |
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Single configuration authority, CMake target graph, execution and tool boundaries |
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Full software gates, exact candidates and failed attempts for |
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Byte identities of source and actual CI, SDK and candidate archives |
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Original exit conditions, implementation and exact software evidence |
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Migration of old APIs, configuration, objects and external applications |
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Scan scope, test-fixture fixes and borrow/recovery restrictions |
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Physical acceptance, measurement-driven extensions and team workflow |
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Implementation paths, evidence entries, software and physical exit status for each item |
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Concrete P0–P5 implementation and conditional acceptance for this iteration |
The CPU software layer covers M0/M0+/M3/M4/M7/M23/M33/M55/M85. External projects use one strict CPU runtime TOML/fact package through nexus_add_runtime or the installed Runtime component, reusing Core/Arch/I/O faces and the selected baremetal/FreeRTOS adapter. Runtime assembly does not generate SoC, Board, startup or factory; external projects still own specific hardware, product tasks and security policy. The three F407/F470 Boards maintain first-release modes. F103/GD303 add exact finite legacy channel-DMA UART, IRQ I2C and Flash/ADC/PWM selections. G474 adds bulb ADC shots/finite TIM6 DMA, I2C and ECC Flash. H743 retains separate fixed Cache and finite UART DMA contracts, with explicit D2 SRAM1 initialization and SPI/I2C/ADC/PWM/EXTI/IWDG/Flash software fixtures. U575 TZEN0 adds six finite peripheral classes; the independent TZEN1 reference maintains only synchronous GPIO and cooperative jobs of up to eight copied commands. Static factories retain exact mode state and resources without generating product tasks. These source implementations do not qualify whole families, all peripherals or complete security domains; physical HIL remains unexecuted.
The current contracts for this industrial-peripheral iteration are exact support, the adjacent SoC README files and mainstream MCU adaptation. Source implementation, targeted developer results and final frozen-source software qualification are recorded separately. The version-bound historical results below do not cover new code or supply unexecuted test counts, SDK, offline reproduction or candidate status for this iteration.
The historical SoC-extension baseline at fixed source 98270512 completed all Native contracts, tool and configuration tests, 121 ARM images, 104 CPU-runtime variants, independent SDK consumption and full GitHub CI. Eight public H743/U575 reference configurations each completed two independent network-disabled builds with byte-identical ELF/BIN and were sealed as unsigned software candidates. Exact scope and raw evidence are in the results index. Later documentation commits only record that source and inherit no new code-execution qualification. Hardware is not connected; all physical HIL is not_executed. The current bounded F407 masked Flash tail transfer does not provide generic running-state adoption. SOC-34 DVFS remains unimplemented. SOC-35 now has a bounded software subset for U575 retained time and Stop2, using an independent RTC time domain and an explicit WUT/Stop2 owner. A separately selected finite SRAM4/LPDMA copy uses the same owner. General peripheral LPBAM remains unimplemented; physical copy, retention, accuracy, power and wake acceptance remain unexecuted. The complete SOC-35 exit remains open; all 55 original exit conditions remain unchanged.
A separately selected LPTIM1 single-tuple LPBAM software reference uses the same concrete Stop2 owner for fixed SRAM4 CCR1/RCR=0/ARR updates and partial-failure recovery of explicit start/stop. It establishes no pin route, complete waveform playback or board qualification; physical HIL remains not_executed and the original IO-32/SOC-35 exit criteria stay unchanged. The complete SDK consumer plan is defined by the maintained transport policy; historical v7/v8 execution records cannot cover new selections. This page does not claim complete SDK, offline reproduction or software-candidate qualification for additions.
The existing build-system delivery binds cc6a065c; its complete results are recorded separately in the build-results index and cannot inherit the historical SoC execution identity above. That version’s eight candidates select H743 HSI64/Cache off and U575 MSIS4/TZEN=0 empty/UART, baremetal/FreeRTOS references; they do not expand physical support. The 72-stage software plan was not executed as one complete plan invocation. OCI recipe rebuilding, CP311 offline installation and physical HIL remain unexecuted. Later documentation commits only describe that exact code source.
docs/archive/ retains historical designs, results and old Sphinx tutorials; these confer no current support or acceptance. Current public API documentation is generated only from existing public include trees. Code formatting and backslash Doxygen style retain the root .clang-format, .editorconfig and existing standards.
Behavior changes follow TDD. GoogleTest/GoogleMock enter host test targets only; production firmware remains C11. Commit hooks actually run the complete testing/configure/ci/workflows tool suites and all GoogleTest contracts, rejecting incomplete, filtered or skipped reports. Execution results prove current contracts; actual RED→GREEN history is recorded in PRs and raw logs.