Nexus Embedded Platform 0.1.0
Statically assembled reusable embedded mechanisms
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model.h
Go to the documentation of this file.
1
9#ifndef NEXUS_MODEL_H
10#define NEXUS_MODEL_H
11
12#include "nexus/io/adc.h"
13#include "nexus/io/exti.h"
14#include "nexus/io/flash.h"
15#include "nexus/io/gpio.h"
16#include "nexus/io/i2c.h"
17#include "nexus/io/spi.h"
18#include "nexus/io/timer.h"
19#include "nexus/io/uart.h"
20#include "nexus/io/watchdog.h"
21#ifdef __cplusplus
22extern "C" {
23#endif
28extern const nx_gpio_port_t* const nx_native_gpio;
29extern const nx_uart_port_t* const nx_native_uart;
30extern const nx_spi_endpoint_t* const nx_native_spi;
31extern const nx_spi_port_t* const nx_native_spi_port;
32extern const nx_i2c_port_t* const nx_native_i2c_port;
33extern const nx_i2c_endpoint_t* const nx_native_i2c;
34extern const nx_flash_port_t* const nx_native_flash;
35extern const nx_watchdog_port_t* const nx_native_watchdog;
36extern const nx_exti_port_t* const nx_native_exti;
37extern const nx_pwm_port_t* const nx_native_pwm;
38extern const nx_adc_port_t* const nx_native_adc;
70nx_result_t nx_native_gpio_configure(uint32_t mask, uint32_t initial);
77void nx_native_gpio_input(uint32_t value);
83uint32_t nx_native_gpio_output(void);
96
112 const nx_uart_tx_request_t* request);
113
132 const nx_irq_policy_t* policy,
133 const nx_irq_source_t* source);
134
153nx_result_t nx_native_uart_receive(uint8_t byte, uint32_t flags);
164void nx_native_uart_fault(bool start_failure, bool hold_drain);
181nx_result_t nx_native_spi_configure(uint8_t* registers, size_t length);
189void nx_native_spi_fault(size_t fail_after, bool busy);
207nx_result_t nx_native_i2c_configure(uint8_t* memory, size_t length,
208 uint8_t address);
217void nx_native_i2c_fault(nx_result_t result, bool stuck);
231 const nx_flash_geometry_t* geometry);
238void nx_native_flash_fault(size_t pulse_count);
247void nx_native_watchdog_boot(uint32_t causes);
268 nx_exti_event_t* events, size_t capacity);
289nx_result_t nx_native_pwm_configure(uint32_t tick_hz, uint32_t period_ticks);
303nx_result_t nx_native_adc_configure(const uint16_t* samples, size_t count,
304 uint8_t resolution_bits,
305 uint32_t reference_mv);
311void nx_native_adc_fault(size_t sample_count);
321void nx_native_gpio_model_input(const nx_gpio_port_t* binding, uint32_t value);
343 const nx_native_uart_config_t* config);
364 uint8_t byte, uint32_t flags);
375 bool start_failure, bool hold_drain);
396 uint8_t* registers, size_t length);
406void nx_native_spi_model_fault(const nx_spi_port_t* binding, size_t fail_after,
407 bool busy);
428 uint8_t* memory, size_t length,
429 uint8_t address);
440 bool stuck);
451nx_native_flash_model_configure(const nx_flash_port_t* binding, uint8_t* memory,
452 const nx_flash_geometry_t* geometry);
463 size_t pulse_count);
474 uint32_t causes);
495 uint8_t line, nx_exti_edge_t edge,
496 nx_exti_event_t* events,
497 size_t capacity);
508 uint8_t line, nx_exti_edge_t edge);
519 uint32_t tick_hz,
520 uint32_t period_ticks);
531 const uint16_t* samples, size_t count,
532 uint8_t resolution_bits,
533 uint32_t reference_mv);
544 size_t sample_count);
545
554 bool automatic_irq);
555
558
565void nx_native_spi_model_drain_hold(const nx_spi_port_t* binding, bool hold);
566
575
588#ifdef __cplusplus
589}
590#endif
591
592#endif
Reviewed ADC single-shot and low-rate polling scans.
struct nx_adc_port nx_adc_port_t
Definition adc.h:18
Static EXTI line bindings, bounded event storage and drain.
nx_exti_edge_t
Definition exti.h:17
struct nx_exti_port nx_exti_port_t
Definition exti.h:16
Full physical Flash geometry and explicit bounded regions.
struct nx_flash_port nx_flash_port_t
Definition flash.h:15
Fixed GPIO authorization masks and bounded port operations.
struct nx_gpio_port nx_gpio_port_t
Definition gpio.h:15
Address endpoints, repeated START and explicit STOP settlement.
struct nx_i2c_endpoint nx_i2c_endpoint_t
Definition i2c.h:18
struct nx_i2c_port nx_i2c_port_t
Definition i2c.h:17
nx_result_t nx_native_adc_configure(const uint16_t *samples, size_t count, uint8_t resolution_bits, uint32_t reference_mv)
Configure fixed ADC raw-count sequence and format.
const nx_spi_port_t *const nx_native_spi_port
nx_result_t nx_native_spi_configure(uint8_t *registers, size_t length)
Configure a fixed SPI echo or register-file model.
const nx_watchdog_port_t *const nx_native_watchdog
const nx_i2c_port_t *const nx_native_i2c_port
nx_result_t nx_native_clock_configure(bool enabled, nx_time_us_t now)
Switch host model to a deterministic clock domain.
const nx_spi_endpoint_t *const nx_native_spi
const nx_adc_port_t *const nx_native_adc
void nx_native_watchdog_model_boot(const nx_watchdog_port_t *binding, uint32_t causes)
Operate on the selected Native model face only.
nx_result_t nx_native_flash_configure(uint8_t *memory, const nx_flash_geometry_t *geometry)
Configure physical-geometry RAM model, clearly nonpersistent.
nx_result_t nx_native_exti_emit(uint8_t line, nx_exti_edge_t edge)
Inject a timestamped selected edge fact.
nx_result_t nx_native_exti_model_emit(const nx_exti_port_t *binding, uint8_t line, nx_exti_edge_t edge)
Operate on the selected Native model face only.
void nx_native_spi_model_fault(const nx_spi_port_t *binding, size_t fail_after, bool busy)
Operate on the selected Native model face only.
const nx_exti_port_t *const nx_native_exti
void nx_native_spi_model_drain_hold(const nx_spi_port_t *binding, bool hold)
Inject inability to prove SPI hardware drain.
const nx_gpio_port_t *const nx_native_gpio
Fixed model bindings; no allocation, lookup, probe or construction.
void nx_native_spi_fault(size_t fail_after, bool busy)
Inject bounded SPI partial failure or controller occupancy.
void nx_native_i2c_model_fault(const nx_i2c_port_t *binding, nx_result_t result, bool stuck)
Operate on the selected Native model face only.
nx_result_t nx_native_uart_model_configure(const nx_uart_port_t *binding, const nx_native_uart_config_t *config)
Operate on the selected Native model face only.
nx_result_t nx_native_flash_model_configure(const nx_flash_port_t *binding, uint8_t *memory, const nx_flash_geometry_t *geometry)
Operate on the selected Native model face only.
void nx_native_flash_fault(size_t pulse_count)
Inject program/erase failure after complete modeled pulses.
nx_result_t nx_native_pwm_model_configure(const nx_pwm_port_t *binding, uint32_t tick_hz, uint32_t period_ticks)
Operate on the selected Native model face only.
uint32_t nx_native_gpio_output(void)
Observe output state for a host behavioral assertion.
void nx_native_uart_model_fault(const nx_uart_port_t *binding, bool start_failure, bool hold_drain)
Operate on the selected Native model face only.
bool nx_native_watchdog_model_expired(const nx_watchdog_port_t *binding)
Operate on the selected Native model face only.
bool nx_native_spi_model_cs_active(const nx_spi_endpoint_t *binding)
Operate on the selected Native model face only.
const nx_flash_port_t *const nx_native_flash
nx_result_t nx_native_pwm_configure(uint32_t tick_hz, uint32_t period_ticks)
Configure fixed PWM model timer facts after writer quiescence.
nx_result_t nx_native_exti_model_configure(const nx_exti_port_t *binding, uint8_t line, nx_exti_edge_t edge, nx_exti_event_t *events, size_t capacity)
Operate on the selected Native model face only.
nx_result_t nx_native_exti_configure(uint8_t line, nx_exti_edge_t edge, nx_exti_event_t *events, size_t capacity)
Configure exact storage for one static EXTI line.
void nx_native_flash_model_fault(const nx_flash_port_t *binding, size_t pulse_count)
Operate on the selected Native model face only.
size_t nx_native_uart_transmitted(void)
Observe captured TX bytes.
void nx_native_i2c_fault(nx_result_t result, bool stuck)
Inject NACK, arbitration loss or a stuck bus.
void nx_native_adc_model_fault(const nx_adc_port_t *binding, size_t sample_count)
Operate on the selected Native model face only.
void nx_native_uart_irq_step(void)
Execute one deterministic TX IRQ byte/TC event.
nx_result_t nx_native_adc_model_configure(const nx_adc_port_t *binding, const uint16_t *samples, size_t count, uint8_t resolution_bits, uint32_t reference_mv)
Operate on the selected Native model face only.
const nx_i2c_endpoint_t *const nx_native_i2c
nx_result_t nx_native_i2c_configure(uint8_t *memory, size_t length, uint8_t address)
Configure one 7-bit-address register-file I2C model.
bool nx_native_spi_cs_active(void)
Check the modeled CS level after a transaction.
uint32_t nx_native_gpio_model_output(const nx_gpio_port_t *binding)
Operate on the selected Native model face only.
const nx_uart_port_t *const nx_native_uart
void nx_native_uart_model_irq_step(const nx_uart_port_t *binding)
Operate on the selected Native model face only.
nx_result_t nx_native_gpio_configure(uint32_t mask, uint32_t initial)
Configure the fixed GPIO model after writer quiescence.
nx_result_t nx_native_uart_configure(const nx_native_uart_config_t *config)
Configure exact RX/TX fixture capacities on the fixed UART.
nx_result_t nx_native_clock_advance(uint64_t duration_us)
Advance deterministic time without an implicit hardware IRQ.
nx_result_t nx_native_i2c_model_configure(const nx_i2c_endpoint_t *binding, uint8_t *memory, size_t length, uint8_t address)
Operate on the selected Native model face only.
nx_result_t nx_native_uart_model_irq_configure(const nx_uart_port_t *binding, const nx_irq_policy_t *policy, const nx_irq_source_t *source)
Copy explicit IRQ facts into a quiescent host UART model.
void nx_native_spi_model_irq_step(const nx_spi_port_t *binding)
Inject one bounded SPI byte/idle event on the exact Native bus.
void nx_native_spi_model_async_configure(const nx_spi_port_t *binding, bool automatic_irq)
Choose explicit or automatic modeled SPI IRQ stepping.
nx_result_t nx_native_uart_model_idle(const nx_uart_port_t *binding)
Inject UART IDLE and publish its current valid byte prefix.
nx_result_t nx_native_uart_model_receive(const nx_uart_port_t *binding, uint8_t byte, uint32_t flags)
Operate on the selected Native model face only.
void nx_native_uart_fault(bool start_failure, bool hold_drain)
Configure start failure or inability to prove hardware drain.
nx_result_t nx_native_uart_receive(uint8_t byte, uint32_t flags)
Inject one RX IRQ fact into bounded selected-profile storage.
nx_result_t nx_native_uart_tx_validate(void *context, const nx_uart_tx_request_t *request)
Validate exact Native TX context for selected RS485 binding.
nx_result_t nx_native_adc_model_trigger(const nx_adc_port_t *binding)
Inject one ADC timer-trigger scan into a free selected block.
void nx_native_watchdog_boot(uint32_t causes)
Reset the watchdog fixture as a simulated new boot.
nx_result_t nx_native_spi_model_configure(const nx_spi_endpoint_t *binding, uint8_t *registers, size_t length)
Operate on the selected Native model face only.
const nx_pwm_port_t *const nx_native_pwm
void nx_native_gpio_input(uint32_t value)
Inject one GPIO input snapshot in the deterministic model.
size_t nx_native_uart_model_transmitted(const nx_uart_port_t *binding)
Operate on the selected Native model face only.
void nx_native_adc_fault(size_t sample_count)
Inject ADC failure after a prefix of complete samples.
void nx_native_gpio_model_input(const nx_gpio_port_t *binding, uint32_t value)
Operate on the selected Native model face only.
bool nx_native_watchdog_expired(void)
Observe expiration of the enabled deterministic IWDG.
Single-executor polling SPI endpoints and complete CS transactions.
struct nx_spi_port nx_spi_port_t
Definition spi.h:17
struct nx_spi_endpoint nx_spi_endpoint_t
Definition spi.h:18
nx_result_t
Operation result; success at submission means admission only.
Definition status.h:21
Edge facts; timestamp precision and coalescing are provider-specific.
Definition exti.h:35
Read-only physical geometry; platform reserves no product storage.
Definition flash.h:28
Immutable CPU and kernel facts for cold wake binding.
Definition wake.h:46
Actual publisher facts read before attaching any borrowed sink.
Definition wake.h:54
UART storage belongs to the fixture until port stop and IRQ quiescence.
Definition model.h:88
nx_uart_rx_profile_t profile
Definition model.h:89
Caller-owned TX descriptor; initialize base before first prepare.
Definition uart.h:50
uint64_t nx_time_us_t
Microseconds in one boot/clock domain; no wall-clock semantics.
Definition time.h:20
Fixed timer/channel PWM with one shared base configuration.
struct nx_pwm_port nx_pwm_port_t
Definition timer.h:15
IRQ TX requests and independently budgeted byte/event reception.
struct nx_uart_port nx_uart_port_t
Definition uart.h:18
nx_uart_rx_profile_t
Definition uart.h:19
Irreversible IWDG effects and neutral hardware reset causes.
struct nx_watchdog_port nx_watchdog_port_t
Definition watchdog.h:16