接入复核的 Board package¶
精确 SoC 已有维护 provider 时使用本指南。Board 增加 PCB 事实与复核 binding，不复制厂商 SDK，也不授权每一条硅片 route。实际未观察的 PCB revision、焊桥和电压保持未知。
收集最小事实¶
记录完整料号、封装、来源文档 revision 和保留 provenance。记录晶振值、供电条件、SWD reservation、pin、有效电平、跳线条件和安全初始输出。区分文档默认与这块实际板卡的观察。先接入一个 LED 和一条 console route。
下面是完整维护 Board 文件，包含 soc_family：
{
"schema_version": 1,
"id": "stm32f407zg-qiming-v31",
"soc": "STM32F407ZGT6",
"soc_family": "stm32f407",
"source_revision": "V3.1",
"physical_pcb_revision": null,
"clocks": {
"hse_hz": 8000000
},
"bindings": [
{
"id": "led0",
"controller": "GPIOE",
"route": "gpio-pe3",
"initial": 8,
"mask": 8
},
{
"id": "led1",
"controller": "GPIOE",
"route": "gpio-pe4",
"initial": 16,
"mask": 16
},
{
"id": "led2",
"controller": "GPIOG",
"route": "gpio-pg9",
"initial": 512,
"mask": 512
},
{
"id": "uart1",
"controller": "USART1",
"route": "usart1-pa9-pa10"
},
{
"id": "flash0",
"controller": "FLASH",
"route": "flash-internal"
},
{
"id": "iwdg0",
"controller": "IWDG",
"route": "iwdg"
},
{
"id": "can1",
"controller": "CAN1",
"route": "can1-pa11-pa12"
},
{
"id": "can2",
"controller": "CAN2",
"route": "can2-pb12-pb13"
}
],
"reserved_resources": [
"PA13",
"PA14"
],
"unknowns": [
"Physical PCB revision and fitted options not inspected",
"SPI/I2C/PWM/ADC/EXTI external wiring not bound or physically qualified",
"CAN optional fitted transceivers, termination and jumper positions not inspected; software pad routes only, physical CAN qualification not executed"
],
"provenance": [
{
"url": "https://github.com/petercwq/STM32407/blob/master/启明欣欣407开发板(高配版)V3.1例程使用手册.pdf",
"scope": "V3.1 LED identities and low-active behavior"
},
{
"repository": "https://github.com/petercwq/STM32407",
"tree": "08c5f513f1677388fcacaa519dca0c9ef00b6d2e",
"led_header_blob": "63ed6144e8d33f947fbe2784a9962d2913028ac8",
"led_source_blob": "4adeb6f04323f6c8ae4eabf3308334e3e6910277",
"clock_source_blob": "e99736d005f731db67300447d77ce96901d4c3ec",
"uart_source_blob": "e0f9a0fdf6633de6ef5f1c451c2966f22dae204b",
"scope": "LED pins and inactive initialization; HSE_VALUE 8 MHz with PLL_M 8 / PLL_N 336 / PLL_P 2; USART1 PA9/PA10 AF7"
},
{
"repository": "https://github.com/petercwq/STM32407",
"tree": "08c5f513f1677388fcacaa519dca0c9ef00b6d2e",
"scope": "CAN1 sample blob 8731616cf0d5bf02917c76463c49e722b39eb415 PA11/PA12 AF9; CAN2 blob ef8da679c5e7c7163fe2a48a80b6ce8f9d6ecfaa PB12/PB13 AF9. Fitted transceiver options and jumper positions require commissioning inspection."
}
]
}
接入合同拥有字段与资源要求。描述私有 PCB 数据的 Board package 保留在外部产品仓库。公开可复用 package 位于 boards/；普通 package 只需 board.json 与 README。仅当维护数据不能表达电气动作时，才增加有界中性 Board hook。
通过实际 resolver 验证¶
从 Nexus 仓库根目录执行，编写前先检查已知合法参考：
python tools/configure/configure.py list-bindings --assembly tools/configure/assemblies/qiming-baremetal-uart.toml
python tools/configure/configure.py check --assembly tools/configure/assemblies/qiming-baremetal-uart.toml
python tools/configure/configure.py explain --assembly tools/configure/assemblies/qiming-baremetal-uart.toml
自己的 package 在外部完整 assembly 中选择 board_package，以绝对 assembly 路径运行同样命令。相对 package 路径从 authored assembly 定位。仅 JSON 语法检查不能证明 SoC identity、clock、route 或资源兼容。未知字段与未复核 route 必须拒绝。
构建并记录选定范围¶
通过自己的 assembly 和锁定 ARM 工具链配置外部 consumer。Baremetal 与 FreeRTOS 使用独立输出根。检查 resolved claim、vector/startup、strong handler、ELF/BIN/map 及每个物理 RAM/Flash 预算。Factory 在 start 前查找必须纯净，实例状态必须独立。模型/链接测试使用软件 Board fixture，并准确标注其接线性质。
无设备时准备 HIL plan。物理资格要求独立复核 station、实际 Board/part/UID/probe/wiring、精确 image 和真实 raw measurement。来源复核的 pad 不建立 connector 连通、抗扰或安全电气行为。